# Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. # SPDX-License-Identifier: BSD-3-Clause # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions are met: # 1. Redistributions of source code must retain the above copyright notice, this # list of conditions and the following disclaimer. # 2. Redistributions in binary form must reproduce the above copyright notice, # this list of conditions and the following disclaimer in the documentation # and/or other materials provided with the distribution. # 3. Neither the name of the copyright holder nor the names of its # contributors may be used to endorse or promote products derived from # this software without specific prior written permission. # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" # AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE # DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE # FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL # DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER # CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, # OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. import argparse from typing import Optional, Tuple, Type import math import cuda.bindings.driver as cuda import torch import cutlass import cutlass.cute as cute import cutlass.cute.testing as testing import cutlass.pipeline as pipeline import cutlass.torch as cutlass_torch import cutlass.utils as utils import cutlass.utils.hopper_helpers as sm90_utils """ A high-performance batched dense GEMM (C = A * B) example for the NVIDIA Hopper architecture using CuTe DSL. - Matrix A is MxKxL, L is batch dimension, A can be row-major("K") or column-major("M") - Matrix B is NxKxL, L is batch dimension, B can be row-major("N") or column-major("K") - Matrix C is MxNxL, L is batch dimension, C can be row-major("N") or column-major("M") This GEMM kernel supports the following features: - Utilizes Tensor Memory Access (TMA) for efficient memory operations - Utilizes Hopper's WGMMA for matrix multiply-accumulate (MMA) operations - Implements TMA multicast with cluster to reduce L2 memory traffic - Support persistent tile scheduling to better overlap memory load/store with MMA between tiles - Support warp specialization to avoid explicit pipelining between mainloop load and MMA This GEMM works as follows: 1. DMA warp: Load A and B matrices from global memory (GMEM) to shared memory (SMEM) using TMA operations. 2. MMA warp: - Perform matrix multiply-accumulate (MMA) operations using WGMMA instruction. - Store results from registers (RMEM) to shared memory (SMEM), then to global memory (GMEM) with TMA operations. Hopper WGMMA instructions operate as follows: - Read matrix A from SMEM - Read matrix B from SMEM - Perform MMA operation and store the result in Accumulator(register) To run this example: .. code-block:: bash python examples/hopper/dense_gemm_persistent.py \ --mnkl 8192,8192,8192,1 --tile_shape_mn 128,256 \ --cluster_shape_mn 1,1 --a_dtype Float16 --b_dtype Float16 \ --c_dtype Float16 --acc_dtype Float32 \ --a_major k --b_major k --c_major n The above example command compute batched gemm with M=8192, N=8192, K=8192, batch_count=1. The Hopper WGMMA tile shape is 128x256x64 and the cluster shape is (1,1). The input, mma accumulator and output data type are set as fp16, fp32 and fp16, respectively. To collect performance with NCU profiler: .. code-block:: bash ncu python examples/hopper/dense_gemm.py \ --mnkl 8192,8192,8192,1 --tile_shape_mn 128,256 \ --cluster_shape_mn 1,1 --a_dtype Float16 --b_dtype Float16 \ --c_dtype Float16 --acc_dtype Float32 \ --a_major k --b_major k --c_major n Constraints are same as dense_gemm.py: * Supported input data types: fp16, fp8 (e4m3fn, e5m2), int8, uint8 * For fp16 types, A and B must have the same data type * For fp8 types, A and B can have different types (e4m3fn or e5m2) * For 8-bit integer types, A and B can have different types (int8 or uint8) * 8-bit types (e4m3fn, e5m2, int8, uint8) only support k-major layout * CTA tile shape M must be 64/128 * CTA tile shape N must be 64/128/256 * CTA tile shape K must be 64 * Cluster shape M/N must be positive and power of 2, total cluster size <= 4 * The contiguous dimension of A/B/C tensors must be at least 16 bytes aligned, i.e, number of elements is a multiple of 8, 16 for Float16, and Float8, respectively. """ # Helpers to parse args def parse_comma_separated_ints(s: str): try: return tuple([int(x.strip()) for x in s.split(",")]) except ValueError: raise argparse.ArgumentTypeError( "Invalid format. Expected comma-separated integers." ) def parse_arguments() -> argparse.Namespace: parser = argparse.ArgumentParser(description="Example of MxNxKxL GEMM on Hopper.") parser.add_argument( "--mnkl", type=parse_comma_separated_ints, default=(4096, 4096, 4096, 1), help="mnkl dimensions (comma-separated)", ) parser.add_argument( "--tile_shape_mn", type=parse_comma_separated_ints, choices=[(128, 128), (128, 256), (128, 64), (64, 64)], default=(128, 128), help="Cta tile shape (comma-separated)", ) parser.add_argument( "--cluster_shape_mn", type=parse_comma_separated_ints, choices=[(1, 1), (2, 1), (1, 2), (2, 2)], default=(1, 1), help="Cluster shape (comma-separated)", ) parser.add_argument( "--swizzle_size", type=int, default=1, help="Swizzling size in the unit of cluster for improving L2 cache hit rate", ) parser.add_argument( "--raster_order", type=str, choices=["along_m", "along_n"], default="along_m", help="Rasterization order of clusters", ) parser.add_argument( "--a_dtype", type=cutlass.dtype, default=cutlass.Float16, ) parser.add_argument( "--b_dtype", type=cutlass.dtype, default=cutlass.Float16, ) parser.add_argument( "--c_dtype", type=cutlass.dtype, default=cutlass.Float16, ) parser.add_argument( "--acc_dtype", type=cutlass.dtype, default=cutlass.Float32, ) parser.add_argument("--a_major", choices=["k", "m"], type=str, default="k") parser.add_argument("--b_major", choices=["k", "n"], type=str, default="k") parser.add_argument("--c_major", choices=["n", "m"], type=str, default="n") parser.add_argument( "--tolerance", type=float, default=1e-01, help="Tolerance for validation" ) parser.add_argument( "--warmup_iterations", type=int, default=0, help="Warmup iterations" ) parser.add_argument( "--iterations", type=int, default=1, help="Number of iterations to run the kernel", ) parser.add_argument( "--skip_ref_check", action="store_true", help="Skip reference checking" ) parser.add_argument( "--use_cold_l2", action="store_true", default=False, help="Use circular buffer tensor sets to ensure L2 cold cache", ) args = parser.parse_args() if len(args.mnkl) != 4: parser.error("--mnkl must contain exactly 4 values") if len(args.tile_shape_mn) != 2: parser.error("--tile_shape_mn must contain exactly 2 values") if len(args.cluster_shape_mn) != 2: parser.error("--cluster_shape_mn must contain exactly 2 values") return args class HopperWgmmaGemmPersistentKernel: """ This class implements batched matrix multiplication (C = A x B) with support for various data types and architectural features specific to Hopper GPUs. :param acc_dtype: Data type for accumulation during computation :type acc_dtype: type[cutlass.Numeric] :param tile_shape_mn: Shape of the CTA tile (M,N) :type tile_shape_mn: Tuple[int, int] :param cluster_shape_mn: Cluster dimensions (M,N) for parallel processing :type cluster_shape_mn: Tuple[int, int] :note: Supported A/B data types: - Float16 A and B must have the same data type - Float8E4M3FN/Float8E5M2 A and B can have different types (Float8E4M3FN/Float8E5M2) only support k-major layout - Int8/Uint8 A and B can have different types (Int8/Uint8) only support k-major layout :note: Supported accumulation types: - Float32/Float16 (for all floating point inputs) - Int32 (for Int8/Uint8 inputs) :note: Constraints: - CTA tile M must be 64/128 - CTA tile N must be 64/128/256 - CTA tile K must be 64 - Cluster shape M/N must be positive and power of 2, total cluster size <= 4 Example: >>> gemm = HopperWgmmaGemmPersistentKernel( ... acc_dtype=cutlass.Float32, ... tile_shape_mn=(128, 256), ... cluster_shape_mn=(1, 1) ... ) >>> gemm(a_tensor, b_tensor, c_tensor, stream) """ def __init__( self, acc_dtype: type[cutlass.Numeric], tile_shape_mn: tuple[int, int], cluster_shape_mn: tuple[int, int], swizzle_size: int, raster_along_m: bool, ): """ Initializes the configuration for a Hopper dense GEMM kernel. This configuration includes data types for operands, tile shape, cluster configuration, and thread layout. :param acc_dtype: Data type for accumulation during computation :type acc_dtype: type[cutlass.Numeric] :param tile_shape_mn: Shape of the CTA tile (M,N) :type tile_shape_mn: Tuple[int, int] :param cluster_shape_mn: Cluster dimensions (M,N) for parallel processing :type cluster_shape_mn: Tuple[int, int] """ self.acc_dtype = acc_dtype self.cluster_shape_mn = cluster_shape_mn self.swizzle_size = swizzle_size self.raster_along_m = raster_along_m self.mma_inst_shape_mn = None # K dimension is deferred in _setup_attributes self.tile_shape_mnk = (*tile_shape_mn, 1) # For large tile size, using two warp groups is preferred because using only one warp # group may result in register spill self.atom_layout_mnk = ( (2, 1, 1) if self.tile_shape_mnk[0] > 64 and self.tile_shape_mnk[1] > 128 else (1, 1, 1) ) self.num_mcast_ctas_a = None self.num_mcast_ctas_b = None self.is_a_mcast = False self.is_b_mcast = False self.tiled_mma = None self.occupancy = 1 self.num_dma_warp_groups = 1 self.num_mma_warp_groups = math.prod(self.atom_layout_mnk) self.num_warps_per_warp_group = 4 self.num_threads_per_warp_group = self.num_warps_per_warp_group * 32 self.threads_per_cta = ( self.num_dma_warp_groups + self.num_mma_warp_groups ) * self.num_threads_per_warp_group self.load_warp_id = 0 self.epi_store_warp_id = ( self.num_dma_warp_groups * self.num_warps_per_warp_group ) self.load_register_requirement = 40 self.mma_register_requirement = 232 self.smem_capacity = utils.get_smem_capacity_in_bytes("sm_90") self.ab_stage = None self.epi_stage = None self.a_smem_layout_staged = None self.b_smem_layout_staged = None self.epi_smem_layout_staged = None self.epi_tile = None self.shared_storage = None self.buffer_align_bytes = 1024 self.num_mma_threads = ( self.num_mma_warp_groups * self.num_threads_per_warp_group ) self.epilog_sync_barrier = pipeline.NamedBarrier( barrier_id=1, num_threads=self.num_mma_threads ) def _setup_attributes(self): """Set up configurations that are dependent on GEMM inputs This method configures various attributes based on the input tensor properties (data types, leading dimensions) and kernel settings: - Configuring tiled MMA - Computing MMA/cluster/tile shapes - Computing cluster layout - Computing multicast CTAs for A/B - Computing epilogue subtile - Setting up A/B/C stage counts in shared memory - Computing A/B/C shared memory layout """ # check the cta tile shape if self.tile_shape_mnk[0] not in [64, 128]: raise ValueError("CTA tile shape M must be 64/128") if self.tile_shape_mnk[1] not in [64, 128, 256]: raise ValueError("CTA tile shape N must be 64/128/256") self.tiled_mma = sm90_utils.make_trivial_tiled_mma( self.a_dtype, self.b_dtype, self.a_layout.sm90_mma_major_mode(), self.b_layout.sm90_mma_major_mode(), self.acc_dtype, self.atom_layout_mnk, tiler_mn=(64, self.tile_shape_mnk[1]), ) mma_inst_shape_k = cute.size(self.tiled_mma.shape_mnk, mode=[2]) mma_inst_tile_k = 4 self.tile_shape_mnk = ( self.tile_shape_mnk[0], self.tile_shape_mnk[1], mma_inst_shape_k * mma_inst_tile_k, ) self.cta_layout_mnk = cute.make_layout((*self.cluster_shape_mn, 1)) self.num_mcast_ctas_a = self.cluster_shape_mn[1] self.num_mcast_ctas_b = self.cluster_shape_mn[0] self.is_a_mcast = self.num_mcast_ctas_a > 1 self.is_b_mcast = self.num_mcast_ctas_b > 1 is_cooperative = self.atom_layout_mnk == (2, 1, 1) self.epi_tile = self._sm90_compute_tile_shape_or_override( self.tile_shape_mnk, self.c_dtype, is_cooperative=is_cooperative ) # Compute stage before compute smem layout self.ab_stage, self.epi_stage = self._compute_stages( self.tile_shape_mnk, self.a_dtype, self.b_dtype, self.epi_tile, self.c_dtype, self.smem_capacity, self.occupancy, ) ( self.a_smem_layout_staged, self.b_smem_layout_staged, self.epi_smem_layout_staged, ) = self._make_smem_layouts( self.tile_shape_mnk, self.epi_tile, self.a_dtype, self.a_layout, self.b_dtype, self.b_layout, self.ab_stage, self.c_dtype, self.c_layout, self.epi_stage, ) @cute.jit def __call__( self, a: cute.Tensor, b: cute.Tensor, c: cute.Tensor, max_active_clusters: cutlass.Constexpr, stream: cuda.CUstream, ): """Execute the GEMM operation in steps: - Setup static attributes - Setup TMA load/store atoms and tensors - Compute grid size - Define shared storage for kernel - Launch the kernel synchronously :param a: Input tensor A :type a: cute.Tensor :param b: Input tensor B :type b: cute.Tensor :param c: Output tensor C :type c: cute.Tensor :param max_active_clusters: Maximum number of active clusters :type max_active_clusters: cutlass.Constexpr :param stream: CUDA stream for asynchronous execution :type stream: cuda.CUstream """ # setup static attributes before smem/grid/tma computation self.a_dtype = a.element_type self.b_dtype = b.element_type self.c_dtype = c.element_type self.a_layout = utils.LayoutEnum.from_tensor(a) self.b_layout = utils.LayoutEnum.from_tensor(b) self.c_layout = utils.LayoutEnum.from_tensor(c) if cutlass.const_expr( self.a_dtype.width == 16 and self.a_dtype != self.b_dtype ): raise TypeError(f"Type mismatch: {self.a_dtype} != {self.b_dtype}") if cutlass.const_expr(self.a_dtype.width != self.b_dtype.width): raise TypeError( f"Type width mismatch: {self.a_dtype.width} != {self.b_dtype.width}" ) if cutlass.const_expr(self.a_dtype.width != 16 and self.a_dtype.width != 8): raise TypeError("a_dtype should be float16, float8, or int8 ") self._setup_attributes() tma_atom_a, tma_tensor_a = self._make_tma_atoms_and_tensors( a, self.a_smem_layout_staged, (self.tile_shape_mnk[0], self.tile_shape_mnk[2]), self.cluster_shape_mn[1], ) tma_atom_b, tma_tensor_b = self._make_tma_atoms_and_tensors( b, self.b_smem_layout_staged, (self.tile_shape_mnk[1], self.tile_shape_mnk[2]), self.cluster_shape_mn[0], ) tma_atom_c, tma_tensor_c = self._make_tma_store_atoms_and_tensors( c, self.epi_smem_layout_staged, self.epi_tile, ) tile_sched_params, grid = self._compute_grid( c, self.tile_shape_mnk, self.cluster_shape_mn, self.swizzle_size, self.raster_along_m, max_active_clusters, ) @cute.struct class SharedStorage: mainloop_pipeline_array_ptr: cute.struct.MemRange[ cutlass.Int64, self.ab_stage * 2 ] sA: cute.struct.Align[ cute.struct.MemRange[ self.a_dtype, cute.cosize(self.a_smem_layout_staged) ], self.buffer_align_bytes, ] sB: cute.struct.Align[ cute.struct.MemRange[ self.b_dtype, cute.cosize(self.b_smem_layout_staged) ], self.buffer_align_bytes, ] sC: cute.struct.Align[ cute.struct.MemRange[ self.c_dtype, cute.cosize(self.epi_smem_layout_staged), ], self.buffer_align_bytes, ] self.shared_storage = SharedStorage # Launch the kernel synchronously self.kernel( tma_atom_a, tma_tensor_a, tma_atom_b, tma_tensor_b, tma_atom_c, tma_tensor_c, self.tiled_mma, self.cta_layout_mnk, self.a_smem_layout_staged, self.b_smem_layout_staged, self.epi_smem_layout_staged, tile_sched_params, ).launch( grid=grid, block=[self.threads_per_cta, 1, 1], cluster=(*self.cluster_shape_mn, 1), min_blocks_per_mp=1, stream=stream, ) return # GPU device kernel @cute.kernel def kernel( self, tma_atom_a: cute.CopyAtom, mA_mkl: cute.Tensor, tma_atom_b: cute.CopyAtom, mB_nkl: cute.Tensor, tma_atom_c: cute.CopyAtom, mC_mnl: cute.Tensor, tiled_mma: cute.TiledMma, cta_layout_mnk: cute.Layout, a_smem_layout_staged: cute.ComposedLayout, b_smem_layout_staged: cute.ComposedLayout, epi_smem_layout_staged: cute.ComposedLayout, tile_sched_params: utils.PersistentTileSchedulerParams, ): """ GPU device kernel performing the batched GEMM computation. :param tma_atom_a: TMA copy atom for A tensor :type tma_atom_a: cute.CopyAtom :param mA_mkl: Input tensor A :type mA_mkl: cute.Tensor :param tma_atom_b: TMA copy atom for B tensor :type tma_atom_b: cute.CopyAtom :param mB_nkl: Input tensor B :type mB_nkl: cute.Tensor :param tma_atom_c: TMA copy atom for C tensor :type tma_atom_c: cute.CopyAtom :param mC_mnl: Output tensor C :type mC_mnl: cute.Tensor :param tiled_mma: Tiled MMA object :type tiled_mma: cute.TiledMma :param cta_layout_mnk: CTA layout :type cta_layout_mnk: cute.Layout :param a_smem_layout_staged: Shared memory layout for A :type a_smem_layout_staged: cute.ComposedLayout :param b_smem_layout_staged: Shared memory layout for B :type b_smem_layout_staged: cute.ComposedLayout :param epi_smem_layout_staged: Shared memory layout for epilogue :type epi_smem_layout_staged: cute.ComposedLayout :param tile_sched_params: Parameters for the persistent tile scheduler :type tile_sched_params: utils.PersistentTileSchedulerParams """ tidx, _, _ = cute.arch.thread_idx() warp_idx = cute.arch.warp_idx() warp_idx = cute.arch.make_warp_uniform(warp_idx) # Prefetch Tma desc if warp_idx == 0: cute.nvgpu.cpasync.prefetch_descriptor(tma_atom_a) cute.nvgpu.cpasync.prefetch_descriptor(tma_atom_b) cute.nvgpu.cpasync.prefetch_descriptor(tma_atom_c) cta_rank_in_cluster = cute.arch.make_warp_uniform( cute.arch.block_idx_in_cluster() ) cluster_coord_mnk = cta_layout_mnk.get_flat_coord(cta_rank_in_cluster) a_mcast_mask = cute.make_layout_image_mask( cta_layout_mnk, cluster_coord_mnk, mode=1 ) b_mcast_mask = cute.make_layout_image_mask( cta_layout_mnk, cluster_coord_mnk, mode=0 ) a_mcast_mask = a_mcast_mask if self.is_a_mcast else 0 b_mcast_mask = b_mcast_mask if self.is_b_mcast else 0 a_smem_layout = cute.slice_(a_smem_layout_staged, (None, None, 0)) b_smem_layout = cute.slice_(b_smem_layout_staged, (None, None, 0)) tma_copy_bytes = cute.size_in_bytes( self.a_dtype, a_smem_layout ) + cute.size_in_bytes(self.b_dtype, b_smem_layout) # Alloc and init AB full/empty + ACC full mbar (pipeline) smem = cutlass.utils.SmemAllocator() storage = smem.allocate(self.shared_storage) # mbar arrays mainloop_pipeline_array_ptr = storage.mainloop_pipeline_array_ptr.data_ptr() # Threads/warps participating in this pipeline mainloop_pipeline_producer_group = pipeline.CooperativeGroup( pipeline.Agent.Thread ) # Each warp will constribute to the arrive count with the number of mcast size mcast_size = self.num_mcast_ctas_a + self.num_mcast_ctas_b - 1 consumer_arrive_cnt = ( mcast_size * self.num_mma_warp_groups * self.num_warps_per_warp_group ) mainloop_pipeline_consumer_group = pipeline.CooperativeGroup( pipeline.Agent.Thread, consumer_arrive_cnt ) mainloop_pipeline = pipeline.PipelineTmaAsync.create( barrier_storage=mainloop_pipeline_array_ptr, num_stages=self.ab_stage, producer_group=mainloop_pipeline_producer_group, consumer_group=mainloop_pipeline_consumer_group, tx_count=tma_copy_bytes, cta_layout_vmnk=cute.make_layout((1, *cta_layout_mnk.shape)), ) # Cluster arrive after barrier init if cute.size(self.cluster_shape_mn) > 1: cute.arch.cluster_arrive_relaxed() # Generate smem tensor A/B sA = storage.sA.get_tensor( a_smem_layout_staged.outer, swizzle=a_smem_layout_staged.inner ) sB = storage.sB.get_tensor( b_smem_layout_staged.outer, swizzle=b_smem_layout_staged.inner ) sC = storage.sC.get_tensor( epi_smem_layout_staged.outer, swizzle=epi_smem_layout_staged.inner ) # Local_tile partition global tensors # (bM, bK, RestM, RestK, RestL) gA_mkl = cute.local_tile( mA_mkl, cute.slice_(self.tile_shape_mnk, (None, 0, None)), (None, None, None), ) # (bN, bK, RestN, RestK, RestL) gB_nkl = cute.local_tile( mB_nkl, cute.slice_(self.tile_shape_mnk, (0, None, None)), (None, None, None), ) # (bM, bN, RestM, RestN, RestL) gC_mnl = cute.local_tile( mC_mnl, cute.slice_(self.tile_shape_mnk, (None, None, 0)), (None, None, None), ) # Partition shared tensor for TMA load A/B # TMA load A partition_S/D a_cta_layout = cute.make_layout(cute.slice_(cta_layout_mnk, (0, None, 0)).shape) a_cta_crd = cluster_coord_mnk[1] tAsA, tAgA = cute.nvgpu.cpasync.tma_partition( tma_atom_a, a_cta_crd, a_cta_layout, cute.group_modes(sA, 0, 2), cute.group_modes(gA_mkl, 0, 2), ) # TMA load B partition_S/D b_cta_layout = cute.make_layout(cute.slice_(cta_layout_mnk, (None, 0, 0)).shape) b_cta_crd = cluster_coord_mnk[0] tBsB, tBgB = cute.nvgpu.cpasync.tma_partition( tma_atom_b, b_cta_crd, b_cta_layout, cute.group_modes(sB, 0, 2), cute.group_modes(gB_nkl, 0, 2), ) # Partition global tensor for TiledMMA_A/B/C warp_group_idx = cute.arch.make_warp_uniform( tidx // self.num_threads_per_warp_group ) mma_warp_group_thread_layout = cute.make_layout( self.num_mma_warp_groups, stride=self.num_threads_per_warp_group ) thr_mma = tiled_mma.get_slice( mma_warp_group_thread_layout(warp_group_idx - self.num_dma_warp_groups) ) # Make fragments tCsA = thr_mma.partition_A(sA) tCsB = thr_mma.partition_B(sB) tCrA = tiled_mma.make_fragment_A(tCsA) tCrB = tiled_mma.make_fragment_B(tCsB) tCgC = thr_mma.partition_C(gC_mnl) acc_shape = tCgC.shape[:3] accumulators = cute.make_rmem_tensor(acc_shape, self.acc_dtype) k_tile_cnt = cute.size(gA_mkl, mode=[3]) # Cluster wait for barrier init if cute.size(self.cluster_shape_mn) > 1: cute.arch.cluster_wait() else: cute.arch.sync_threads() is_dma_warp_group = warp_group_idx < self.num_dma_warp_groups if is_dma_warp_group: cute.arch.warpgroup_reg_dealloc(self.load_register_requirement) if warp_idx == self.load_warp_id: tile_sched = utils.StaticPersistentTileScheduler.create( tile_sched_params, cute.arch.block_idx(), cute.arch.grid_dim() ) work_tile = tile_sched.initial_work_tile_info() mainloop_producer_state = pipeline.make_pipeline_state( pipeline.PipelineUserType.Producer, self.ab_stage ) while work_tile.is_valid_tile: tile_coord_mnl = work_tile.tile_idx tAgA_mkl = tAgA[(None, tile_coord_mnl[0], None, tile_coord_mnl[2])] tBgB_nkl = tBgB[(None, tile_coord_mnl[1], None, tile_coord_mnl[2])] mainloop_producer_state.reset_count() for k_tile in range(k_tile_cnt): # Conditionally wait for AB buffer empty mainloop_pipeline.producer_acquire(mainloop_producer_state) # Slice to global/shared memref to current k_tile tAgA_k = tAgA_mkl[(None, mainloop_producer_state.count)] tAsA_pipe = tAsA[(None, mainloop_producer_state.index)] tBgB_k = tBgB_nkl[(None, mainloop_producer_state.count)] tBsB_pipe = tBsB[(None, mainloop_producer_state.index)] # TMA load A/B cute.copy( tma_atom_a, tAgA_k, tAsA_pipe, tma_bar_ptr=mainloop_pipeline.producer_get_barrier( mainloop_producer_state ), mcast_mask=a_mcast_mask, ) cute.copy( tma_atom_b, tBgB_k, tBsB_pipe, tma_bar_ptr=mainloop_pipeline.producer_get_barrier( mainloop_producer_state ), mcast_mask=b_mcast_mask, ) # Mainloop pipeline's producer commit is a NOP mainloop_pipeline.producer_commit(mainloop_producer_state) mainloop_producer_state.advance() tile_sched.advance_to_next_work() work_tile = tile_sched.get_current_work() mainloop_pipeline.producer_tail(mainloop_producer_state) # MMA warp group if not is_dma_warp_group: cute.arch.warpgroup_reg_alloc(self.mma_register_requirement) tile_sched = utils.StaticPersistentTileScheduler.create( tile_sched_params, cute.arch.block_idx(), cute.arch.grid_dim() ) work_tile = tile_sched.initial_work_tile_info() mainloop_consumer_read_state = pipeline.make_pipeline_state( pipeline.PipelineUserType.Consumer, self.ab_stage ) mainloop_consumer_release_state = pipeline.make_pipeline_state( pipeline.PipelineUserType.Consumer, self.ab_stage ) num_k_blocks = cute.size(tCrA, mode=[2]) # Partition for epilogue copy_atom_r2s = sm90_utils.sm90_get_smem_store_op( self.c_layout, elem_ty_d=self.c_dtype, elem_ty_acc=self.acc_dtype, ) copy_atom_C = cute.make_copy_atom( cute.nvgpu.warp.StMatrix8x8x16bOp( self.c_layout.is_m_major_c(), 4, ), self.c_dtype, ) tiled_copy_C_Atom = cute.make_tiled_copy_C_atom(copy_atom_C, tiled_mma) tiled_copy_r2s = cute.make_tiled_copy_S( copy_atom_r2s, tiled_copy_C_Atom, ) # (R2S, R2S_M, R2S_N, PIPE_D) thr_copy_r2s = tiled_copy_r2s.get_slice( tidx - self.num_dma_warp_groups * self.num_threads_per_warp_group ) # (t)hread-partition for (r)egister to (s)mem copy (tRS_) tRS_sD = thr_copy_r2s.partition_D(sC) # (R2S, R2S_M, R2S_N) tRS_rAcc = tiled_copy_r2s.retile(accumulators) # Allocate D registers. rD_shape = cute.shape(thr_copy_r2s.partition_S(sC)) tRS_rD_layout = cute.make_layout(rD_shape[:3]) tRS_rD = cute.make_rmem_tensor(tRS_rD_layout.shape, self.acc_dtype) tRS_rD_out = cute.make_rmem_tensor(tRS_rD_layout.shape, self.c_dtype) size_tRS_rD = cute.size(tRS_rD) k_pipe_mmas = 1 prologue_mma_cnt = min(k_pipe_mmas, k_tile_cnt) # Initialize tma store pipeline tma_store_producer_group = pipeline.CooperativeGroup( pipeline.Agent.Thread, self.num_mma_threads, ) tma_store_pipeline = pipeline.PipelineTmaStore.create( num_stages=self.epi_stage, producer_group=tma_store_producer_group, ) while work_tile.is_valid_tile: tile_coord_mnl = work_tile.tile_idx gC_mnl_slice = gC_mnl[(None, None, *tile_coord_mnl)] # MAINLOOP mainloop_consumer_read_state.reset_count() mainloop_consumer_release_state.reset_count() accumulators.fill(0.0) tiled_mma.set(cute.nvgpu.warpgroup.Field.ACCUMULATE, True) cute.nvgpu.warpgroup.fence() for k_tile in range(prologue_mma_cnt): # Wait for TMA copies to complete mainloop_pipeline.consumer_wait(mainloop_consumer_read_state) # WGMMA for k_block_idx in cutlass.range_constexpr(num_k_blocks): k_block_coord = ( None, None, k_block_idx, mainloop_consumer_read_state.index, ) cute.gemm( tiled_mma, accumulators, tCrA[k_block_coord], tCrB[k_block_coord], accumulators, ) cute.nvgpu.warpgroup.commit_group() mainloop_consumer_read_state.advance() for k_tile in range(prologue_mma_cnt, k_tile_cnt): # Wait for TMA copies to complete mainloop_pipeline.consumer_wait(mainloop_consumer_read_state) # WGMMA for k_block_idx in cutlass.range_constexpr(num_k_blocks): k_block_coord = ( None, None, k_block_idx, mainloop_consumer_read_state.index, ) cute.gemm( tiled_mma, accumulators, tCrA[k_block_coord], tCrB[k_block_coord], accumulators, ) cute.nvgpu.warpgroup.commit_group() # Wait on the wgmma barrier for WGMMA to complete cute.nvgpu.warpgroup.wait_group(k_pipe_mmas) mainloop_pipeline.consumer_release(mainloop_consumer_release_state) mainloop_consumer_release_state.advance() mainloop_consumer_read_state.advance() cute.nvgpu.warpgroup.wait_group(0) for k_tile in range(prologue_mma_cnt): mainloop_pipeline.consumer_release(mainloop_consumer_release_state) mainloop_consumer_release_state.advance() # Epilogue tCgC_for_tma_partition = cute.zipped_divide(gC_mnl_slice, self.epi_tile) # thread(b)lock-partition for (s)mem to (g)mem copy (bSG_) bSG_sD, bSG_gD = cute.nvgpu.cpasync.tma_partition( tma_atom_c, 0, cute.make_layout(1), cute.group_modes(sC, 0, 2), tCgC_for_tma_partition, ) epi_tile_num = cute.size(tCgC_for_tma_partition, mode=[1]) epi_tile_shape = tCgC_for_tma_partition.shape[1] epi_tile_layout = cute.make_layout( epi_tile_shape, stride=(epi_tile_shape[1], 1) ) num_prev_epi_tiles = tile_sched.num_tiles_executed * epi_tile_num for epi_idx in cutlass.range_constexpr(epi_tile_num): # Copy from accumulators to D registers for epi_v in cutlass.range_constexpr(size_tRS_rD): tRS_rD[epi_v] = tRS_rAcc[epi_idx * size_tRS_rD + epi_v] # Type conversion acc_vec = tRS_rD.load() tRS_rD_out.store(acc_vec.to(self.c_dtype)) # Copy from D registers to shared memory epi_buffer = (num_prev_epi_tiles + epi_idx) % cute.size( tRS_sD, mode=[3] ) cute.copy( tiled_copy_r2s, tRS_rD_out, tRS_sD[(None, None, None, epi_buffer)], ) cute.arch.fence_proxy( cute.arch.ProxyKind.async_shared, space=cute.arch.SharedSpace.shared_cta, ) self.epilog_sync_barrier.arrive_and_wait() gmem_coord = epi_tile_layout.get_hier_coord(epi_idx) # Copy from shared memory to global memory if warp_idx == self.epi_store_warp_id: cute.copy( tma_atom_c, bSG_sD[(None, epi_buffer)], bSG_gD[(None, gmem_coord)], ) tma_store_pipeline.producer_commit() tma_store_pipeline.producer_acquire() self.epilog_sync_barrier.arrive_and_wait() tile_sched.advance_to_next_work() work_tile = tile_sched.get_current_work() tma_store_pipeline.producer_tail() @staticmethod def _compute_stages( tile_shape_mnk: tuple[int, int, int], a_dtype: type[cutlass.Numeric], b_dtype: type[cutlass.Numeric], epi_tile: tuple[int, int], c_dtype: type[cutlass.Numeric], smem_capacity: int, occupancy: int, ) -> tuple[int, int]: """Computes the number of stages for A/B/C operands based on heuristics. :param tile_shape_mnk: The shape (M, N, K) of the CTA tile. :type tile_shape_mnk: tuple[int, int, int] :param a_dtype: Data type of operand A. :type a_dtype: type[cutlass.Numeric] :param b_dtype: Data type of operand B. :type b_dtype: type[cutlass.Numeric] :param epi_tile: Epilogue tile shape :type epi_tile: Tuple[int, int] :param c_dtype: The data type of the output tensor :type c_dtype: type[cutlass.Numeric] :param smem_capacity: Total available shared memory capacity in bytes. :type smem_capacity: int :param occupancy: Target number of CTAs per SM (occupancy). :type occupancy: int :return: A tuple containing the computed number of stages for: (A/B operand stages, epilogue stages) :rtype: tuple[int, int] """ a_shape = cute.slice_(tile_shape_mnk, (None, 0, None)) b_shape = cute.slice_(tile_shape_mnk, (0, None, None)) ab_bytes_per_stage = ( cute.size(a_shape) * a_dtype.width // 8 + cute.size(b_shape) * b_dtype.width // 8 ) c_bytes_per_stage = cute.size(epi_tile) * c_dtype.width // 8 epi_stage = 4 epi_bytes = c_bytes_per_stage * epi_stage mbar_helpers_bytes = 1024 ab_stage = ( smem_capacity // occupancy - (mbar_helpers_bytes + epi_bytes) ) // ab_bytes_per_stage return ab_stage, epi_stage @staticmethod def _sm90_compute_tile_shape_or_override( tile_shape_mnk: tuple[int, int, int], element_type: type[cutlass.Numeric], is_cooperative: bool = False, epi_tile_override: Optional[tuple[int, int]] = None, ) -> tuple[int, int]: """Compute the epilogue tile shape or use override if provided. :param tile_shape_mnk: CTA tile shape (M,N,K) :type tile_shape_mnk: Tuple[int, int, int] :param element_type: Data type of elements :type element_type: type[cutlass.Numeric] :param is_cooperative: Whether to use cooperative approach :type is_cooperative: bool :param epi_tile_override: Optional override for epilogue tile shape :type epi_tile_override: Tuple[int, int] or None :return: Computed epilogue tile shape :rtype: Tuple[int, int] """ if epi_tile_override is not None: return epi_tile_override if is_cooperative: tile_m = min(128, cute.size(tile_shape_mnk, mode=[0])) tile_n = min(32, cute.size(tile_shape_mnk, mode=[1])) return (tile_m, tile_n) else: n_perf = 64 if element_type.width == 8 else 32 tile_m = min(64, cute.size(tile_shape_mnk, mode=[0])) tile_n = min(n_perf, cute.size(tile_shape_mnk, mode=[1])) return (tile_m, tile_n) @staticmethod def _make_smem_layouts( tile_shape_mnk: tuple[int, int, int], epi_tile: tuple[int, int], a_dtype: type[cutlass.Numeric], a_layout: utils.LayoutEnum, b_dtype: type[cutlass.Numeric], b_layout: utils.LayoutEnum, ab_stage: int, c_dtype: type[cutlass.Numeric], c_layout: utils.LayoutEnum, epi_stage: int, ) -> tuple[cute.ComposedLayout, cute.ComposedLayout, cute.ComposedLayout]: """Create shared memory layouts for A, B, and C tensors. :param tile_shape_mnk: CTA tile shape (M,N,K) :type tile_shape_mnk: Tuple[int, int, int] :param epi_tile: Epilogue tile shape :type epi_tile: Tuple[int, int] :param a_dtype: Data type for matrix A :type a_dtype: type[cutlass.Numeric] :param a_layout: Layout enum for matrix A :type a_layout: utils.LayoutEnum :param b_dtype: Data type for matrix B :type b_dtype: type[cutlass.Numeric] :param b_layout: Layout enum for matrix B :type b_layout: utils.LayoutEnum :param ab_stage: Number of stages for A/B tensors :type ab_stage: int :param c_dtype: Data type for output matrix C :type c_dtype: type[cutlass.Numeric] :param c_layout: Layout enum for the output matrix C :type c_layout: utils.LayoutEnum :param epi_stage: Number of epilogue stages :type epi_stage: int :return: Tuple of shared memory layouts for A, B, and C :rtype: Tuple[cute.ComposedLayout, cute.ComposedLayout, cute.ComposedLayout] """ a_smem_shape = cute.slice_(tile_shape_mnk, (None, 0, None)) a_is_k_major = ( a_layout.sm90_mma_major_mode() == cute.nvgpu.warpgroup.OperandMajorMode.K ) b_is_k_major = ( b_layout.sm90_mma_major_mode() == cute.nvgpu.warpgroup.OperandMajorMode.K ) a_major_mode_size = tile_shape_mnk[2 if a_is_k_major else 0] a_smem_layout_atom = cute.nvgpu.warpgroup.make_smem_layout_atom( sm90_utils.get_smem_layout_atom( a_layout, a_dtype, a_major_mode_size, ), a_dtype, ) a_smem_layout_staged = cute.tile_to_shape( a_smem_layout_atom, cute.append(a_smem_shape, ab_stage), order=(0, 1, 2) if a_is_k_major else (1, 0, 2), ) b_smem_shape = cute.slice_(tile_shape_mnk, (0, None, None)) b_major_mode_size = tile_shape_mnk[2 if b_is_k_major else 1] b_smem_layout_atom = cute.nvgpu.warpgroup.make_smem_layout_atom( sm90_utils.get_smem_layout_atom( b_layout, b_dtype, b_major_mode_size, ), b_dtype, ) b_smem_layout_staged = cute.tile_to_shape( b_smem_layout_atom, cute.append(b_smem_shape, ab_stage), order=(0, 1, 2) if b_is_k_major else (1, 0, 2), ) c_smem_shape = epi_tile c_major_mode_size = epi_tile[1] if c_layout.is_n_major_c() else epi_tile[0] c_smem_layout_atom = cute.nvgpu.warpgroup.make_smem_layout_atom( sm90_utils.get_smem_layout_atom( c_layout, c_dtype, c_major_mode_size, ), c_dtype, ) epi_smem_layout_staged = cute.tile_to_shape( c_smem_layout_atom, cute.append(c_smem_shape, epi_stage), order=(1, 0, 2) if c_layout.is_m_major_c() else (0, 1, 2), ) return a_smem_layout_staged, b_smem_layout_staged, epi_smem_layout_staged @staticmethod def _compute_grid( c: cute.Tensor, tile_shape_mnk: tuple[int, int, int], cluster_shape_mn: tuple[int, int], swizzle_size: int, raster_along_m: bool, max_active_clusters: cutlass.Constexpr, ) -> tuple[int, int, int]: """Compute grid shape for the output tensor C. :param c: The output tensor C :type c: cute.Tensor :param tile_shape_mnk: The shape (M, N, K) of the CTA tile. :type tile_shape_mnk: tuple[int, int, int] :param cluster_shape_mn: Shape of each cluster in M, N dimensions. :type cluster_shape_mn: tuple[int, int] :param max_active_clusters: Maximum number of active clusters. :type max_active_clusters: cutlass.Constexpr :return: Grid shape for kernel launch. :rtype: tuple[int, int, int] """ c_shape = cute.slice_(tile_shape_mnk, (None, None, 0)) gc = cute.zipped_divide(c, tiler=c_shape) num_ctas_mnl = gc[(0, (None, None, None))].shape cluster_shape_mnl = (*cluster_shape_mn, 1) tile_sched_params = utils.PersistentTileSchedulerParams( num_ctas_mnl, cluster_shape_mnl, swizzle_size, raster_along_m, ) grid = utils.StaticPersistentTileScheduler.get_grid_shape( tile_sched_params, max_active_clusters ) return tile_sched_params, grid @staticmethod def _make_tma_store_atoms_and_tensors( tensor_c: cute.Tensor, epi_smem_layout_staged: cute.ComposedLayout, epi_tile: tuple[int, int], ) -> tuple[cute.CopyAtom, cute.Tensor]: """Create TMA atoms and tensors for C tensor storage. :param tensor_c: Output tensor C :type tensor_c: cute.Tensor :param epi_smem_layout_staged: Shared memory layout for epilogue :type epi_smem_layout_staged: cute.ComposedLayout :param epi_tile: Epilogue tile shape :type epi_tile: Tuple[int, int] :return: TMA atom and tensor for C :rtype: Tuple[cute.CopyAtom, cute.Tensor] """ epi_smem_layout = cute.slice_(epi_smem_layout_staged, (None, None, 0)) tma_atom_c, tma_tensor_c = cute.nvgpu.cpasync.make_tiled_tma_atom( cute.nvgpu.cpasync.CopyBulkTensorTileS2GOp(), tensor_c, epi_smem_layout, epi_tile, ) return tma_atom_c, tma_tensor_c @staticmethod def _make_tma_atoms_and_tensors( tensor: cute.Tensor, smem_layout_staged: cute.ComposedLayout, smem_tile: tuple[int, int], mcast_dim: int, ) -> tuple[cute.CopyAtom, cute.Tensor]: """Create TMA atoms and tensors for input tensors. :param tensor: Input tensor (A or B) :type tensor: cute.Tensor :param smem_layout_staged: Shared memory layout for the tensor :type smem_layout_staged: cute.ComposedLayout :param smem_tile: Shared memory tile shape :type smem_tile: Tuple[int, int] :param mcast_dim: Multicast dimension :type mcast_dim: int :return: TMA atom and tensor :rtype: Tuple[cute.CopyAtom, cute.Tensor] """ op = ( cute.nvgpu.cpasync.CopyBulkTensorTileG2SOp() if mcast_dim == 1 else cute.nvgpu.cpasync.CopyBulkTensorTileG2SMulticastOp() ) smem_layout = cute.slice_(smem_layout_staged, (None, None, 0)) tma_atom, tma_tensor = cute.nvgpu.cpasync.make_tiled_tma_atom( op, tensor, smem_layout, smem_tile, num_multicast=mcast_dim, ) return tma_atom, tma_tensor @staticmethod def is_valid_dtypes( a_dtype: Type[cutlass.Numeric], b_dtype: Type[cutlass.Numeric], acc_dtype: Type[cutlass.Numeric], c_dtype: Type[cutlass.Numeric], a_major: str, b_major: str, ) -> bool: """ Check if the dtypes are valid :param a_dtype: The data type of tensor A :type a_dtype: Type[cutlass.Numeric] :param b_dtype: The data type of tensor B :type b_dtype: Type[cutlass.Numeric] :param acc_dtype: The data type of the accumulator :type acc_dtype: Type[cutlass.Numeric] :param c_dtype: The data type of the output tensor :type c_dtype: Type[cutlass.Numeric] :param a_major: major mode of tensor A :type a_major: str :param b_major: major mode of tensor B :type b_major: str :return: True if the dtypes are valid, False otherwise :rtype: bool """ is_valid = True valid_ab_dtypes = { cutlass.Float16, cutlass.Float8E4M3FN, cutlass.Float8E5M2, cutlass.Uint8, cutlass.Int8, } if a_dtype not in valid_ab_dtypes: is_valid = False if b_dtype not in valid_ab_dtypes: is_valid = False # make sure a_dtype == b_dtype for Float16 if a_dtype.width == 16 and a_dtype != b_dtype: is_valid = False if a_dtype.width != b_dtype.width: is_valid = False if not a_dtype.is_same_kind(b_dtype): is_valid = False # for 8-bit types, this implementation only supports k-major layout if (a_dtype.width == 8 and a_major != "k") or ( b_dtype.width == 8 and b_major != "k" ): is_valid = False # Define compatibility mapping between accumulator type and AB type acc_ab_compatibility = { cutlass.Float32: { cutlass.Float16, cutlass.Float8E4M3FN, cutlass.Float8E5M2, }, cutlass.Float16: { cutlass.Float16, cutlass.Float8E4M3FN, cutlass.Float8E5M2, }, cutlass.Int32: {cutlass.Uint8, cutlass.Int8}, } # Check compatibility between accumulator type and A type if a_dtype not in acc_ab_compatibility[acc_dtype]: is_valid = False # Define compatibility mapping between accumulator type and C type acc_c_compatibility = { cutlass.Float32: { cutlass.Float32, cutlass.Float16, cutlass.Float8E4M3FN, cutlass.Float8E5M2, }, cutlass.Float16: { cutlass.Float32, cutlass.Float16, cutlass.Float8E4M3FN, cutlass.Float8E5M2, }, cutlass.Int32: { cutlass.Float32, cutlass.Float16, cutlass.Int32, cutlass.Int8, cutlass.Uint8, }, } # Check compatibility between accumulator type and C type if c_dtype not in acc_c_compatibility[acc_dtype]: is_valid = False return is_valid @staticmethod def is_valid_tensor_alignment( m: int, n: int, k: int, l: int, ab_dtype: Type[cutlass.Numeric], c_dtype: Type[cutlass.Numeric], a_major: str, b_major: str, c_major: str, ) -> bool: """ Check if the tensor alignment is valid :param m: The number of rows in the A tensor :type m: int :param n: The number of columns in the B tensor :type n: int :param k: The number of columns in the A tensor :type k: int :param l: The number of columns in the C tensor :type l: int :param ab_dtype: The data type of the A and B operands :type ab_dtype: Type[cutlass.Numeric] :param c_dtype: The data type of the output tensor :type c_dtype: Type[cutlass.Numeric] :param a_major: The major axis of the A tensor :type a_major: str :param b_major: The major axis of the B tensor :type b_major: str :param c_major: The major axis of the C tensor :type c_major: str :return: True if the problem shape is valid, False otherwise :rtype: bool """ is_valid = True def check_contigous_16B_alignment(dtype, is_mode0_major, tensor_shape): major_mode_idx = 0 if is_mode0_major else 1 num_major_elements = tensor_shape[major_mode_idx] num_contiguous_elements = 16 * 8 // dtype.width return num_major_elements % num_contiguous_elements == 0 if ( not check_contigous_16B_alignment(ab_dtype, a_major == "m", (m, k, l)) or not check_contigous_16B_alignment(ab_dtype, b_major == "n", (n, k, l)) or not check_contigous_16B_alignment(c_dtype, c_major == "m", (m, n, l)) ): is_valid = False return is_valid def run( mnkl: Tuple[int, int, int, int], a_dtype: Type[cutlass.Numeric], b_dtype: Type[cutlass.Numeric], c_dtype: Type[cutlass.Numeric], acc_dtype: Type[cutlass.Numeric], a_major: str, b_major: str, c_major: str, tile_shape_mn: Tuple[int, int], cluster_shape_mn: Tuple[int, int], swizzle_size: int = 1, raster_along_m: bool = True, tolerance: float = 1e-01, warmup_iterations: int = 0, iterations: int = 1, skip_ref_check: bool = False, use_cold_l2: bool = False, **kwargs, ): """ Prepare A/B/C tensors, launch GPU kernel, and reference checking. :param mnkl: Problem size (M, N, K, L) :type mnkl: Tuple[int, int, int, int] :param a_dtype: Data type for input tensor A :type a_dtype: Type[cutlass.Numeric] :param b_dtype: Data type for input tensor B :type b_dtype: Type[cutlass.Numeric] :param c_dtype: Data type for output tensor C :type c_dtype: Type[cutlass.Numeric] :param acc_dtype: Data type for accumulation during matrix multiplication :type acc_dtype: Type[cutlass.Numeric] :param a_major/b_major/c_major: Memory layout of tensor A/B/C :type a_major/b_major/c_major: str :param tile_shape_mn: CTA tile shape (M, N) :type tile_shape_mn: Tuple[int, int] :param cluster_shape_mn: Cluster shape (M, N) :type cluster_shape_mn: Tuple[int, int] :param tolerance: Tolerance value for reference validation comparison :type tolerance: float :param warmup_iterations: Number of warmup iterations before benchmarking, defaults to 0 :type warmup_iterations: int, optional :param iterations: Number of benchmark iterations to run, defaults to 1 :type iterations: int, optional :param skip_ref_check: Whether to skip reference result validation, defaults to False :type skip_ref_check: bool, optional :param use_cold_l2: Whether to use circular buffer strategy to ensure cold L2 cache, defaults to False :type use_cold_l2: bool, optional :return: Execution time of the GEMM kernel in microseconds :rtype: float """ print("Running Hopper Persistent Dense GEMM with:") print(f"mnkl: {mnkl}") print( f"A dtype: {a_dtype}, B dtype: {b_dtype}, C dtype: {c_dtype}, Acc dtype: {acc_dtype}" ) print(f"Matrix majors - A: {a_major}, B: {b_major}, C: {c_major}") print(f"Tile Shape: {tile_shape_mn}, Cluster Shape: {cluster_shape_mn}") print( f"Swizzle size: {swizzle_size}, Raster order:", "along_m" if raster_along_m else "along_n", ) print(f"Tolerance: {tolerance}") print(f"Warmup iterations: {warmup_iterations}") print(f"Iterations: {iterations}") print(f"Skip reference checking: {skip_ref_check}") print(f"Use cold L2: {use_cold_l2}") # Unpack parameters m, n, k, l = mnkl if not HopperWgmmaGemmPersistentKernel.is_valid_dtypes( a_dtype, b_dtype, acc_dtype, c_dtype, a_major, b_major ): raise TypeError( f"unsupported combination of types and majors: A {a_dtype}, B {b_dtype}, Acc {acc_dtype}, C {c_dtype}, {a_major=}, {b_major=}" ) if not HopperWgmmaGemmPersistentKernel.is_valid_tensor_alignment( m, n, k, l, a_dtype, c_dtype, a_major, b_major, c_major ): raise TypeError( "the contiguous dimension of A/B/C tensors is not 16 bytes aligned" ) if not torch.cuda.is_available(): raise RuntimeError("GPU is required to run this example!") # Create and permute tensor A/B/C a_torch_cpu = cutlass_torch.matrix(l, m, k, a_major == "m", a_dtype) b_torch_cpu = cutlass_torch.matrix(l, n, k, b_major == "n", b_dtype) c_torch_cpu = cutlass_torch.matrix(l, m, n, c_major == "m", c_dtype) a_tensor, _ = cutlass_torch.cute_tensor_like( a_torch_cpu, a_dtype, is_dynamic_layout=True, assumed_align=16 ) b_tensor, _ = cutlass_torch.cute_tensor_like( b_torch_cpu, b_dtype, is_dynamic_layout=True, assumed_align=16 ) c_tensor, c_torch_gpu = cutlass_torch.cute_tensor_like( c_torch_cpu, c_dtype, is_dynamic_layout=True, assumed_align=16 ) gemm = HopperWgmmaGemmPersistentKernel( acc_dtype, tile_shape_mn, cluster_shape_mn, swizzle_size, raster_along_m ) # Compute max active clusters on current device hardware_info = cutlass.utils.HardwareInfo() max_active_clusters = hardware_info.get_max_active_clusters( cluster_shape_mn[0] * cluster_shape_mn[1] ) torch_stream = torch.cuda.Stream() stream = cuda.CUstream(torch_stream.cuda_stream) # Compile gemm kernel compiled_gemm = cute.compile( gemm, a_tensor, b_tensor, c_tensor, max_active_clusters, stream ) if not skip_ref_check: compiled_gemm(a_tensor, b_tensor, c_tensor, stream) torch.cuda.synchronize() # Compute reference result ref = torch.einsum( "mkl,nkl->mnl", a_torch_cpu.to(dtype=torch.float32), b_torch_cpu.to(dtype=torch.float32), ) # Convert ref to c_dtype _, ref_torch_gpu = cutlass_torch.cute_tensor_like( ref, c_dtype, is_dynamic_layout=True, assumed_align=16 ) ref_c = ref_torch_gpu.cpu() # Assert close results torch.testing.assert_close(c_torch_gpu.cpu(), ref_c, atol=tolerance, rtol=1e-03) def generate_tensors(): a_tensor_workspace, _ = cutlass_torch.cute_tensor_like( a_torch_cpu, a_dtype, is_dynamic_layout=True, assumed_align=16 ) b_tensor_workspace, _ = cutlass_torch.cute_tensor_like( b_torch_cpu, b_dtype, is_dynamic_layout=True, assumed_align=16 ) c_tensor_workspace, _ = cutlass_torch.cute_tensor_like( c_torch_cpu, c_dtype, is_dynamic_layout=True, assumed_align=16 ) return testing.JitArguments( a_tensor_workspace, b_tensor_workspace, c_tensor_workspace, stream ) workspace_count = 1 if use_cold_l2: one_workspace_bytes = ( a_torch_cpu.numel() * a_torch_cpu.element_size() + b_torch_cpu.numel() * b_torch_cpu.element_size() + c_torch_cpu.numel() * c_torch_cpu.element_size() ) workspace_count = testing.get_workspace_count( one_workspace_bytes, warmup_iterations, iterations ) exec_time = testing.benchmark( compiled_gemm, workspace_generator=generate_tensors, workspace_count=workspace_count, stream=stream, warmup_iterations=warmup_iterations, iterations=iterations, ) return exec_time # Return execution time in microseconds if __name__ == "__main__": args = parse_arguments() run( args.mnkl, args.a_dtype, args.b_dtype, args.c_dtype, args.acc_dtype, args.a_major, args.b_major, args.c_major, args.tile_shape_mn, args.cluster_shape_mn, args.swizzle_size, True if args.raster_order == "along_m" else False, args.tolerance, args.warmup_iterations, args.iterations, args.skip_ref_check, args.use_cold_l2, ) print("PASS")