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04a3ae0aca
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[Bugfix] Fix multi nodes TP+PP for XPU (#8884)
Signed-off-by: YiSheng5 <syhm@mail.ustc.edu.cn>
Signed-off-by: yan ma <yan.ma@intel.com>
Co-authored-by: YiSheng5 <syhm@mail.ustc.edu.cn>
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2024-10-29 21:34:45 -07:00 |
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d23679eb99
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[Bugfix] fix docker build for xpu (#8652)
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2024-09-22 22:54:18 -07:00 |
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61e85dbad8
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[Doc] xpu backend requires running setvars.sh (#6393)
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2024-07-14 17:10:11 -07:00 |
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728c4c8a06
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[Hardware][Intel GPU] Add Intel GPU(XPU) inference backend (#3814)
Co-authored-by: Jiang Li <jiang1.li@intel.com>
Co-authored-by: Abhilash Majumder <abhilash.majumder@intel.com>
Co-authored-by: Abhilash Majumder <30946547+abhilash1910@users.noreply.github.com>
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2024-06-17 11:01:25 -07:00 |
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