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a547aeb828
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feat(rocm-support): support mamba2 on rocm (#18565)
Signed-off-by: Islam Almersawi <islam.almersawi@openinnovation.ai>
Co-authored-by: Islam Almersawi <islam.almersawi@openinnovation.ai>
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2025-05-27 00:07:53 -07:00 |
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d0bc2f810b
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[Bugfix] Add half type support in reshape_and_cache_cpu_impl on x86 cpu platform (#18430)
Signed-off-by: Yuqi Zhang <yuqizhang@google.com>
Co-authored-by: Yuqi Zhang <yuqizhang@google.com>
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2025-05-23 01:41:37 -07:00 |
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6e588da0f4
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[Build/CI] Fix CUDA 11.8 build (#17679)
Signed-off-by: Tyler Michael Smith <tyler@neuralmagic.com>
Signed-off-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
Signed-off-by: Tyler Michael Smith <tysmith@redhat.com>
Co-authored-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
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2025-05-22 12:13:54 -07:00 |
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dd5fa7e04f
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[ROCm][Kernel][V1] Enable AMD Radeon GPU Custom Paged Attention on v1 (#17004)
Signed-off-by: Hosang Yoon <hosang.yoon@amd.com>
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2025-05-21 08:35:00 -07:00 |
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92247c522e
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[Bug] Fix moe_sum signature (#18440)
Signed-off-by: Bill Nell <bnell@redhat.com>
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2025-05-20 22:37:08 -07:00 |
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258bf621d5
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fix CUDA_check redefinition in #17918 (#18287)
Signed-off-by: Lucia Fang <fanglu@fb.com>
Co-authored-by: Lucia (Lu) Fang <fanglu@meta.com>
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2025-05-19 13:42:35 -07:00 |
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e73b7dfd69
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[Bugfix] fix an illegal memory access was encountered of marlin kernel + act_order (#18245)
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2025-05-16 16:02:44 -07:00 |
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e23564cb70
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use ceil_div in cutlass block scaling shape check (#17918)
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2025-05-16 03:02:58 -07:00 |
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a9944aabfa
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fix: typos (#18151)
Signed-off-by: omahs <73983677+omahs@users.noreply.github.com>
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2025-05-15 02:16:15 -07:00 |
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d93c976a0d
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[Kernel] Have rotary embeddings support tensors (#18046)
Signed-off-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
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2025-05-14 15:43:55 -07:00 |
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f9c069c85e
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Modularize fused experts and integrate PPLX kernels (#15956)
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2025-05-14 13:11:54 -07:00 |
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d4154c35a2
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[Bugfix] fix moe marlin topk_weight loading (#18080)
Co-authored-by: mgoin <mgoin64@gmail.com>
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2025-05-13 23:31:57 -07:00 |
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7b2f28deba
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[AMD][torch.compile] Enable silu+fp8_quant fusion for rocm (#18082)
Signed-off-by: charlifu <charlifu@amd.com>
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2025-05-13 22:13:56 -07:00 |
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e57e4d6e9e
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Fix Broken macro for cutlass moe (#18049)
Signed-off-by: drisspg <drisspguessous@gmail.com>
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2025-05-12 23:31:06 -07:00 |
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d8487ef557
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[ROCm]: Fix build from source failure with gcc14 and ROCm 6.3 (#13779)
Signed-off-by: Arjun Kathuria <arjun.kathuria8@gmail.com>
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2025-05-12 20:36:33 -07:00 |
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60f7624334
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Implements dual-chunk-flash-attn backend for dual chunk attention with sparse attention support (#11844)
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2025-05-12 19:52:47 -07:00 |
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d74e5f37bc
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[Kernel] fp4 marlin kernel (#17687)
Signed-off-by: Jinzhen Lin <linjinzhen@hotmail.com>
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2025-05-10 19:58:49 -07:00 |
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0c0fdae84f
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[Hardware/NVIDIA/Kernel] Enable nvidia/DeepSeek-R1-FP4 Model (#16362)
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2025-05-09 16:24:41 -07:00 |
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376786fac1
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Add cutlass support for blackwell fp8 blockwise gemm (#14383)
Signed-off-by: Shu Wang <shuw@nvidia.com>
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2025-05-08 15:09:55 -07:00 |
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f50dcb7c21
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[Easy] Eliminate c10::optional usage in vllm/csrc (#17819)
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2025-05-08 03:05:10 -07:00 |
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e515668edf
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[Hardware][Power] Enable compressed tensor W8A8 INT8 quantization for POWER (#17153)
Signed-off-by: Akash Kaothalkar <akash.kaothalkar@ibm.com>
Co-authored-by: Akash Kaothalkar <akash.kaothalkar@ibm.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2025-05-07 22:35:03 -07:00 |
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5a499e70d5
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[Kernel][Hardware][AMD] Bf16 mfma opt for ROCm skinny GEMMs (#17071)
Signed-off-by: Hashem Hashemi <hashem.hashemi@amd.com>
Signed-off-by: charlifu <charlifu@amd.com>
Co-authored-by: charlifu <charlifu@amd.com>
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2025-05-07 22:34:49 -07:00 |
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32aa74c09c
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[ROCm][FP8][Kernel] FP8 quantization fused into Custom Paged Attention (#17139)
Signed-off-by: Gregory Shtrasberg <Gregory.Shtrasberg@amd.com>
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2025-05-07 07:12:35 -07:00 |
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98c89e16ff
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Make key optional for rotary embedding (#17566)
Signed-off-by: Yong Hoon Shin <yhshin@meta.com>
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2025-05-07 00:11:46 -07:00 |
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f80ae5bdcf
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[Kernel] Use fused rmsnorm for some models like qwen3 series (#17735)
Signed-off-by: evian <eviantai@u.nus.edu>
Co-authored-by: evian <eviantai@u.nus.edu>
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2025-05-06 23:10:02 -07:00 |
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1a45a61387
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[Kernel] GGUF MoeVec kernel (#16780)
Signed-off-by: SzymonOzog <szymon.ozog@aleph-alpha.com>
Signed-off-by: SzymonOzog <szymon.ozog@gmail.com>
Signed-off-by: Isotr0py <2037008807@qq.com>
Co-authored-by: Isotr0py <2037008807@qq.com>
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2025-05-06 23:07:23 -07:00 |
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a17cef70ea
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Removed unused marlin cuda code (#17684)
Signed-off-by: mgoin <mgoin64@gmail.com>
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2025-05-06 17:59:47 -07:00 |
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1d0c9d6b2d
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[Kernel] some optimizations for dense marlin and moe marlin (#16850)
Signed-off-by: Jinzhen Lin <linjinzhen@hotmail.com>
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2025-05-05 09:39:30 -07:00 |
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3e887d2e0c
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permute/unpermute kernel for moe optimization (#14568)
Signed-off-by: Caleb_Du <Caleb_Du@zju.edu.cn>
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2025-05-02 11:31:55 -07:00 |
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811a6c0972
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[ROCM] Add gfx950 to the custom attention archs (#16034)
Signed-off-by: jpvillam <Juan.Villamizar@amd.com>
Signed-off-by: seungrokjung <seungrok.jung@amd.com>
Signed-off-by: Gregory Shtrasberg <Gregory.Shtrasberg@amd.com>
Co-authored-by: seungrokjung <seungrok.jung@amd.com>
Co-authored-by: Gregory Shtrasberg <Gregory.Shtrasberg@amd.com>
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2025-05-01 11:18:28 -07:00 |
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460a2b1100
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[torch.compile] Add torch inductor pass for fusing silu_and_mul with subsequent scaled_fp8_quant operations (#10867)
Signed-off-by: Sage Moore <sage@neuralmagic.com>
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2025-05-01 07:59:28 -07:00 |
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06ffc7e1d3
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[Misc][ROCm] Exclude cutlass_mla_decode for ROCm build (#17289)
Signed-off-by: Tianyuan Wu <Tianyuan.Wu@amd.com>
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2025-04-29 10:26:42 -07:00 |
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40896bdf3f
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pre-commit autoupdate (#17380)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
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2025-04-29 06:46:55 -07:00 |
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d6da8a8ff2
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[Bugfix] Fix numel() downcast in fused_layernorm_dynamic_per_token_quant.cu (#17316)
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2025-04-28 19:23:18 -07:00 |
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c12df53b60
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[Bugfix] Fix cutlass dispatch for fp8/int8 to properly invoke M<=16 c… (#16751)
Signed-off-by: Ther-LF <2639852836@qq.com>
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2025-04-27 19:38:42 -07:00 |
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ed7a29d9f8
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[NVIDIA] Support Cutlass MLA for Blackwell GPUs (#16032)
Signed-off-by: kaixih <kaixih@nvidia.com>
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2025-04-27 06:29:21 -07:00 |
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9e96f56efb
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Allocate kv_cache with stride order (#16605)
Signed-off-by: shuw <shuw@nvidia.com>
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2025-04-25 22:03:31 -07:00 |
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c8e5be35f7
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[MISC][AMD] Add unused annotation to rocm kernel file (#17097)
Signed-off-by: Lu Fang <lufang@fb.com>
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2025-04-25 20:33:35 -07:00 |
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188b7f9b8c
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[Performance][ROCm] Add skinny gemms for unquantized linear on ROCm (#15830)
Signed-off-by: charlifu <charlifu@amd.com>
Co-authored-by: Tyler Michael Smith <tysmith@redhat.com>
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2025-04-21 20:46:22 -07:00 |
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7b8a2ab76f
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[Kernel] Add expert_map support to Cutlass FP8 MOE (#16861)
Signed-off-by: varun sundar rabindranath <vsundarr@redhat.com>
Co-authored-by: varun sundar rabindranath <vsundarr@redhat.com>
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2025-04-21 20:44:32 -07:00 |
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7eb4255628
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[BugFix] Accuracy fix for llama4 int4 - improperly casted scales (#16801)
Signed-off-by: Lucas Wilkinson <lwilkinson@neuralmagic.com>
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2025-04-17 22:13:29 -07:00 |
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e82ee40de3
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[Bugfix][Kernel] fix potential cuda graph broken for merge_attn_states kernel (#16693)
Signed-off-by: DefTruth <qiustudent_r@163.com>
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2025-04-16 03:31:39 -07:00 |
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d06ba4ed3f
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[Kernel] moe wna16 marlin kernel (#14447)
Signed-off-by: Jinzhen Lin <linjinzhen@hotmail.com>
Co-authored-by: Michael Goin <michael@neuralmagic.com>
Co-authored-by: mgoin <mgoin64@gmail.com>
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2025-04-14 20:05:22 -07:00 |
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4a3a518722
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fix: spelling (#16466)
Signed-off-by: Tianer Zhou <ezhoureal@gmail.com>
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2025-04-11 23:24:22 -07:00 |
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e9528f6dc6
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[Kernel] support merge_attn_states CUDA kernel, 3x speedup (#16173)
Signed-off-by: DefTruth <qiustudent_r@163.com>
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2025-04-11 06:50:50 -06:00 |
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04149cce27
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[BugFix] fix some typos found by typos. (#16314)
Signed-off-by: yihong0618 <zouzou0208@gmail.com>
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2025-04-09 03:43:59 -07:00 |
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4e9cf8c1dd
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[Bugfix] fix gettid method is not define (#16084)
Signed-off-by: rongfu.leng <rongfu.leng@daocloud.io>
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2025-04-08 19:12:44 -07:00 |
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9351f91be9
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[BugFix][ROCm] Fix GGUF MoE Dispatch Block_Dim for ROCm (#16247)
Signed-off-by: Tianyuan Wu <Tianyuan.Wu@amd.com>
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2025-04-08 05:10:26 -07:00 |
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2fa66ef713
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[Bugfix] fix use_atomic_add support of marlin kernel when using v1 engine (#15946)
Signed-off-by: Jinzhen Lin <linjinzhen@hotmail.com>
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2025-04-05 20:04:22 -07:00 |
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230b131b54
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[Bugfix][kernels] Fix half2float conversion in gguf kernels (#15995)
Signed-off-by: Isotr0py <2037008807@qq.com>
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2025-04-04 09:38:58 -07:00 |
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